1. Field of the Invention
The present invention is related to an orthogonal code generating technique used to judge a signal stream to be transferred in a signal transfer operation of a communication system such as a spectrum spread communication system.
2.Description of the Related Art
Very recently, an orthogonal code is utilized in a correlation detection for judging a signal stream in a signal transfer operation of a communication system such as the spectrum spread communication system.
Referring now to FIG. 10, a conventional orthogonal code generating circuit will be described. FIG. 10 is a structural diagram for schematically showing the conventional orthogonal code generating circuit.
The conventional orthogonal code generating circuit 100 is arranged by a ROM unit 102, an address generating unit 104, a parallel-to-serial converting circuit 106, and a timing generating circuit 108. The ROM unit 102 stores orthogonal codes which correspond to code lengths and code numbers. The address generating unit 104 generates an address which corresponds to a code length and a code number. The parallel/serial converting unit 106 reads an orthogonal code stored in the ROM unit 102 as parallel data, and then, converts the read parallel data into serial data. The timing generating unit 108 outputs both address generation timing and conversion timing with respect to both the address generating unit 104 and the parallel/serial converting unit 106.
Next, a description is made of orthogonal code generating operation in the orthogonal code generating circuit 100.
An address of the ROM unit 102, which corresponds to a code length and a code number, is designated by the address generating unit 104 based upon the timing generating unit 108, so that data of an orthogonal code is outputted. Since this orthogonal code data is read in the form of the parallel data, this parallel data is once stored in the parallel/serial converting unit 106, and then, an orthogonal code is generated.
However, in the arrangement of the above-explained conventional orthogonal code generating circuit, if a code length and a code number of an orthogonal code are increased, then the circuit scale of the orthogonal code generating circuit is increased. For instance, when a code length of an orthogonal matrix is equal to 210=1,024 bits, a code number is also equal to 1,024. Accordingly, in order to store all of the orthogonal codes, such a large memory capacity of 1,024×1,024 bits would be required.
Also, in a case such that orthogonal codes having different code lengths are generated, the circuit scale of the orthogonal code generating circuit is increased, and also, the circuit arrangement for the switching operations becomes complex. For example, in the case that both code lengths of 29 and code lengths of 210 of an orthogonal matrix are generated, such a memory capacity defined by (512×512 bits+1,024×1,024 bits) is required so as to store orthogonal codes of the respective code lengths. In addition, the circuit arrangement used to switch these orthogonal codes becomes complex.